The present invention relates to a digital signal transmission system using a digital modulation system such as orthogonal frequency division multiplex (OFDM) modulation system.
In recent years, European countries, the United States of America, and Japan have already put digital broadcasting into operation or some of them are considering digital broadcasting. The OFDM modulation system is regarded as the most likely prospect for digital broadcasting.
This OFDM modulation system is a kind of multi-carrier modulation system, and is the sum of a large number of digitally modulated carrier waves. In addition, each carrier is modulated by QPSK (Quadrature Phase Shift Keying), and the resultant wave of all the modulated carriers is the OFDM signal.
Here, for the OFDM signal, first the QPSK signal, αk(t) of each carrier can be expressed by the following equation.αk(t)=ak(t)·cos(2πkft)+bk(t)·sin(2πkft)  (1)where k is the carrier number, and ak(t), bk(t) are data of k-th carrier and take a value of −1 or 1.
If the number of carriers is N, the OFDM signal is the resultant of N carriers. If this OFDM signal is represented by βk(t), it can be expressed by the following equation (2).βk(t)=Σαk(t) (k=1˜N)  (2)
Incidentally, in the OFDM modulation system, it is common practice to add a guard interval to each signal unit in order to reduce the multi-path effect.
The OFDM signal is formed of those signal units. The symbol of this signal unit is formed of, for example, 1024 effective samples plus 48 samples of guard interval data, or 1072 samples. Also, a stream unit called frame is the sum of 892 symbols and 6 synchronizing symbols, or 900 symbols in total. These stream units are repeated as the OFDM signal.
FIG. 17 is a block diagram of the basic constructions of the modulator and demodulator in a conventional OFDM transmission system. The transmission-side TX construction has a transmission-side processor 101 that includes a transmission path coder 1T, an encoder 2T, an IFFT (Inverse Fast Fourier Transform) 3A, a guard adder 3B, a synchronizing symbol inserter 5, a clock oscillator 6, and an orthogonal modulation processor 8, and a transmission antenna ATX. The receiving-side RX construction has a receiving antenna ARX and a receiving-side processor 203 that includes an AGC 9A, an orthogonal demodulation processor 9B, a synchronizing detector & correlator 4A, an FST corrector 4B, an FFT (Fast Fourier Transform) 3C, a decoder 2R, a transmission path deencoder 1R, and a voltage controlled clock oscillator 10. These transmission-side TX and receiving-side RX are connected by, for example, a wireless transmission path L using radio waves.
The modulation and demodulation processes for OFDM signal will be described with reference to FIG. 17.
Data Din that is continuously supplied to the transmission path coder 1T of the transmission-side processor 101 is, for example, processed for each frame that is formed of 900 symbols. During this frame period, 894 information symbols other than 6 synchronizing symbols, each including 800 samples ranging from the first to 400-th and from the 625-th to 1024-th samples, are processed and produced as intermittent rate-converted data Dii.
The transmission path coder 1T also generates a transmission-side frame control pulse FST at each frame of 900 symbols, and supplies it to other elemental blocks as a frame pulse signal that indicates the start of those synchronizing symbol periods.
The encoder 2T codes the input data Dii into data Rf and If that are mapped on the two axes of I and Q.
The IFFT 3A regards these data Rf and If as frequency components, and converts them to time base signals R (real part) and I (imaginary part) of 1024 samples.
The guard adder 3B adds after the 1024 samples the waves of, for example, the first 48 samples of the waves in the start period of the time base signals R and I of 1024 samples, and produces information symbols Rg and Ug of time base waves of a total of 1072 samples. These 48 samples serve as a protection band when reflected waves are mixed.
The synchronizing symbol inserter 5 inserts, at every 894 in these information symbols Rg and Ig, samples synchronizing waves of 6 symbols that are previously stored in a memory to produce data Rsg and Isg of frames.
These data Rsg and Isg are supplied to the orthogonal modulation processor 8, where they are processed by a D/A converter 81, orthogonal modulator 82 and local oscillator 83 so that an OFDM modulated signal RF with a carrier of high frequency Fc can be produced, amplified and transmitted through the transmission antenna ATX to the transmission path L. The transmission frequency band used is UHF band or microwave band.
The clock CK (of which the frequency is 16 MHz) necessary to process in the transmission side TX is supplied from the clock oscillator 6 to each block as a transmission side clock CKd.
The OFDM modulated signal RF transmitted as above is supplied to the orthogonal demodulation processor 9B via the receiving antenna ARX and via the AGC 9A that handles high frequencies on the receiving side RX. In the orthogonal demodulation processor 9B, an orthogonal modulator 91 multiplies the OFDM modulated signal RF by a local oscillation signal of frequency Fc′ that is fed from a voltage controlled oscillator 93, thus orthogonally demodulated into the base band signal, and then an A/D converter 92 converts it to the digital data R′sg and I′sg.
These data R′sg and I′sg are supplied to the FFT (Fast Fourier Transform) 3C, which then responds to a pulse signal FSTrc to produce a gate signal that is used for FFT and determines the data period of the 1024 samples. That is, the time base wave signals R′sg and I′sg are converted to frequency component signals R′f and I′f by removing the 48 samples for the protection band.
These frequency component signals R′f and I′f are supplied to and decoded by the decoder 2R into data D′0, which is then further decoded by the transmission path decoder 1R into continuous signal Dout.
The data R′sg and I′sg are also supplied to the synchronous detector & correlator 4A, where a synchronizing symbol group is detected from the data. Thus, the pulse FSTr is derived therefrom as a frame pulse. This pulse FSTr is supplied to each block of receiving side RX as a frame control pulse.
In addition, this synchronous detector & correlator 4A compares the synchronizing components of the data R′sg and I′sg with the clock CKrc generated from the voltage controlled clock oscillator 10, and produces a correlation output Sc according to the comparison result, and supplies it to the FST corrector 4B. The FST corrector 4B generates a control voltage VC, thus controlling the voltage controlled clock oscillator 10 to generate the clock CKrc with a correct period, which is then supplied to each block of the receiving side.
Each block shown in FIG. 17 will be described in detail.
The transmission path coder 1T makes interleave processing, energy dispersion processing and error correction code processing in order to prevent data from being erroneous due to different kinds of error that may be mixed during the transmission.
The encoder 2T converts the signal Dii to information at predetermined points on the I and Q axes by use of the data stored in a mapping ROM, and replaces the signal of the period corresponding to unnecessary carrier by 0 to produce data Rf and If.
The IFFT converter 3A converts the input signals Rf and If to the time base waves R and I of the symbol period determined by the clock CKd and pulse FST. Specifically, this IFFT converter may be the PDSP16510 made by Pressy corp. or the equivalent.
The guard adder 3B is formed of a delay circuit for delaying the input signals R and I by 1024 samples, and a switch for selecting only the delayed output from 1025-th sample to 1072-nd sample. These timings are determined by the clock CK and pulse FST. The time base waves ranging from the first sample to the 48-th sample are added to the range from 1025-th sample to the 1072-th sample, of the symbol that is formed of all 1072 samples, to form information symbol Rg and Ig.
FIG. 18 shows one example of the synchronizing symbol inserter 5. First, ROMs 5-1 and 5-2 are controlled by a controller 5-5 of which the operation timing is determined by the clock CK and pulse FST, so that a synchronizing symbol signal can be generated in accordance with the timing of the pulse FST.
Similarly, SELs 5-3 and 5-4 are controlled by a controller 5-6 of which operation timing is determined by the clock CK and pulse FST, so that the synchronizing symbol signals read from the ROMs 5-1 and 5-2 are selected only during the period from the first symbol to the sixth symbol that is a non-signal period at the present stage, of the time base information symbol signals Rg and Ig with guards.
Here, the synchronizing symbol signals include, for example, null (NULL) symbols for roughly finding the existence of the synchronizing symbol group that is in non-signal state during one symbol period, special symbols (hereinafter, referred to as CW symbol) having only one carrier during one symbol period, sweep (SWEEP) symbols that are waveforms changing from the lower limit to upper limit of the transmission frequency band during one symbol period, and for correctly finding the points of symbol switching, and reference symbols indicative of phase reference necessary to delay, detect and demodulate. When 6 synchronizing symbols are used, two auxiliary symbols are added to the above symbols.
The orthogonal modulation processor 8 will be further described. The D/A converter 81 converts the real part signal Rsg and imaginary part signal Isg from digital to analog form. The orthogonal modulator 82 modulates the real part signal on a carrier of frequency FC from oscillator 83, and modulates the imaginary part signal on a frequency-FC carrier of which the phase is shifted 90° out of the carrier FC fed from the oscillator 83, thereby making orthogonal modulation. These modulated signals are combined to produce the OFDM modulated wave signal.
The operation of the receiving side RX will be described. In the receiving side RX, the signal of frames transmitted is supplied to the AGC 9A, where the level of the received signal is changed to a correct level by a control signal Sa internally generated. The OFDM frame signal with its level corrected by the AGC 9A is supplied to the orthogonal demodulation processor 9B.
In this processor 9B, contrary to the transmission side TX, the orthogonal demodulator 91 demodulates the input signal by applying the carrier signal of frequency FC′ from the voltage controlled oscillator 93, producing the real part signal, and by applying the carrier signal shifted 90°, thus producing the imaginary part signal. These analog real part and imaginary part resulting from the demodulation are converted to digital signals R′sg and I′sg by the A/D converter 92.
The synchronizing detector & correlator 4A searches for breakpoints of frames from the received signals R′sg and I′sg, and produces the frame reference FSTrc, and correlation output SC.
The FFT 3C partitions the symbols on the basis of this pulse FSTrc, and performs Fourier transform, thus making OFDM demodulation to produce data R′f and I′f.
The decoder 2R discriminates the data R′f and I′f by, for example, ROM table, and calculates data D′0.
The transmission decoder 1R makes reverse interleave processing, energy reverse dispersion processing and error correction processing, thus producing continuous digital data Dout, signal Sb indicating BER (Bit Error Rate) status of error corrected situation, and receiving side clock signal CKRX.
FIG. 19 shows one example of the specific arrangement of the synchronizing detector & correlator 4A. Referring to FIG. 19, the orthogonally demodulated digital signals, or time base signals R′sg and I′sg are supplied to NULL end detector 4-1 and SWEEP calculator 4-2.
The NULL end detector 4-1 detects the non-signal state or period, NULL in the synchronizing symbols from the group of symbols of frames, rough positions (timing) of the synchronizing symbols, and estimates the SWEEP symbol start points from the NULL end points by use of a timer circuit, thereby producing a SWEEP start command pulse ST.
The SWEEP calculator 4-2, while referring to the SWEEP start command pulse ST, decides the waves existing 2 symbols after the NULL symbol as the SWEEP symbol wave, receives those, and searches for the correct switching timing of each symbol.
Specifically, a memory 4-3 in which patterns of SWEEP symbols are previously stored is used, and the input OFDM signal and the pattern read from the memory 3-4 are processed to undergo, for example, correlation operation, and to thereby produce the correlation output SC, which is then supplied to the FST corrector 4B shown in FIG. 17.
The FST corrector 4B calculates a phase shift from the correct switching timing of each symbol on the basis of the frame pulse FSTr, and produces the correct signal VC for the receiving-side reference clock CKr so that the frame phase on the receiving side can be coincident with the transmitted data.
Turning back to FIG. 19, a frame counter 4-4 starts counting the clock CK on the basis of the SWEEP start command pulse ST, and produces a pulse FSTr each time the count reaches a value (for example, 1072×900) corresponding to the frame period, in which case the count is reset to 0, and counting of pulse CK is started.
Therefore, after that, the pulse FSTr is produced every constant count, or at every frame start point. On the receiving side, this pulse FSTr is used as start timing for fast Fourier transform, decoding and reverse rate conversion.
The specific construction of the NULL end detector 4-1 and SWEEP start position estimating process will be described in detail with reference to FIGS. 20 and 21.
The signals R′sg and I′sg fed to the NULL end detector 4-1 are converted to their absolute values by absolute value circuits 4-1-1 and 4-1-2, and added together by an adder 4-1-3 to produce an added absolute value 4a. 
This added absolute value 4a is compared with a threshold Vth in a comparator 4-1-4. Thus, the comparator 4-1-4 produces a compared output 4b that corresponds to the period in which the added absolute value does not exceed the threshold Vth, or the NULL symbol period between T1 and T2.
Then, an edge detector 4-1-5 detects the leading edge of the signal, or the compared output 4b to produce a leading edge detected output 4c. A delay circuit 4-1-6 delays this output 4c by one symbol to produce the SWEEP start command pulse ST.
This SWEEP start command pulse ST is able to specify a correct SWEEP symbol start position (T3). Thus, since the SWEEP calculator 4-2 can receive the SWEEP symbol waves from the start, the phase shift in the SWEEP calculation can be correctly calculated, and the correct switching timing of each symbol can be searched for.
In other words, by detecting the phase shift by the FST corrector 4B on the basis of the correlation output SC signal produced from the SWEEP calculator 4-2, adjusting the speed of the clock CKrc as the receiving side sample rate, and making synchronizing lock process to the phase of the transmitted synchronizing symbol, it is possible to remove error in the FFT gate timing position. In a case that there is any reflected wave, it is better to place the gate after the symbol period.
Incidentally, if the SWEEP start command pulse is correct in its timing position that is determined on the basis of the detected edge of the synchronizing symbol corresponding to rough adjustment, the FFT gate is reduced in its amount of correction for timing position that is made by the speed adjustment of the clock CKrc corresponding to fine adjustment, and thus the necessary time for the adjustment is also reduced. That is, the gate position can be set with error zero (no error) in a less time, or the best decoding situation can be achieved.
Three examples of the correlation output signal SC in that case are shown in FIGS. 22A, 22B and 22C. From FIGS. 22A and 22C, it will be understood that the correlation output signal SC in that case has no reflected wave and only a sharp peak due to the main wave.
The relation of the synchronizing operation and NULL detecting threshold in the case when there is any reflected wave will be described below.
As shown in FIG. 23, when there is any reflected wave, the NULL end point is detected with large error. Thus, since the detected edge position is delayed, the exactness of rough adjustment is reduced, and the amount of correction for fine adjustment increases. Consequently, the necessary time for fine adjustment is increased, and it is delayed to attain the best decoding situation. If the effect of the reflected wave is reduced, selecting the threshold Vth to be a lower value will make the NULL end point due to main wave be detected with ease. For example, the lower value of the threshold Vth may be 30 percent of the average power level of the received signal. As a result, the amount of shift at the time of rough adjustment decreases, so that the necessary time for fine adjustment can be prevented from being extended.
FIG. 24 shows one example of the correlation output signal SC in such case. From FIG. 24, it will be obvious that the correlation output signal SC in this case has a peak due to main wave and another peak due to a reflected wave.
The above descriptions were made under the assumption of high CN (carrier to noise ratio) that means the mixture of small noise component.
However, as shown in FIG. 25, under a low input electric field intensity, the noise component increases, and a false signal is generated due to the noise component in the NULL period and mixed in the compared result output 4b. Therefore, the exactness of the rough adjustment may be greatly reduced. In addition, when the electric field intensity is further decreased, the noise component in the NULL period always exceeds the threshold Vth, making it impossible at all to detect the NULL period end point. In order to assure the operation at low CN, you should increase the threshold Vth to a high value. For example, the high value of the threshold Vth may be 80 percent of the average power level of the received signal.
FIG. 26 shows one example of the correlation output signal SC in such case. From FIG. 26, it will be apparent that the correlation output signal SC in this case includes a gentle peak due to main wave because much noise is contained in the SWEEP signal received on the basis of the FSTr pulse reproduced on the receiving side and because the degree of coincidence is not increased at higher CN as compared with that at low CN even though it is calculated while the phase in the SWEEP pattern memory 4-3 is being shifted.
While an example of the multi-carrier OFDM modulation has been described so far, a digital transmission system of 64 QAM using a single carrier has the same problem. JP-A-9-247128 discloses a digital signal receiver in which information of multi-path is reproduced from the received signal and displayed together with the received signal level on the display. However, this Japanese document teaches that the display merely displays the number of multi-paths and delay time of the reflected wave as the information about the multi-path (a state of reflected wave). It is difficult to check the actual quality of the digital transmission path of OFDM signal only from such insufficient information. As the result, a good quality of the reproduced image is not always obtained by OFDM modulation.
When such a digital transmission system as described above is used for radio transmission while being carried on a relay mobile, or outside broadcast van 51 (52) for marathon as shown in FIG. 53, a receiving antenna 50 of the receiving station or relay station is required to be always directed toward the transmission antenna of the moving van by direction adjustment so that strong radio waves can be received from the transmission antenna. This direction adjusting operation for the receiving antenna will hereinafter be simply called alignment.
To make the alignment easy, the conventional system shown in FIG. 17 is equipped with means for generating a low frequency signal in response to the electric filed strength (Sa value) that is represented by the control signal Sa in the AGC 9A (for example, means for generating sound of tone interval proportional to the electric field strength though not shown), and with a field strength level meter.
In the conventional analog signal transmission, the transmitted picture quality generally becomes better as the field strength is increased, and thus the operator only adjusts the antenna direction in order that the level meter can indicate the maximum value. In the digital transmission, however, the situation of relatively weak electric field strength, and no reflected wave, or presence of only the main wave will overwhelmingly often provide satisfactory transmission condition as compared with the condition of high electric field intensity and much reflected wave mixed.
FIG. 54 shows one example of the relation among the electric field strength, error rate and reflected wave in the OFDM signal transmission. In this example, it is assumed that the guard interval period of OFDM signal is selected to be 3 μs, and that a constant level reflected wave is mixed in the received signal. The abscissa, delay in FIG. 54 is delay time between main wave and reflected wave. If the error rate as one of the evaluation parameter of signal transmission quality is 1.00E-02 or below, a video signal of moving pictures with allowable quality can be transmitted. As the error rate increases (in the upward direction along the ordinate of the graph of FIG. 54), the signal transmission quality becomes poor. From FIG. 54, it will be understood that the signal transmission quality is, though affected by the electric field level, or the CN or noise of the received signal, most affected by the reflected wave (delayed wave). As illustrated in FIG. 54, when the filed strength is reduced to −70 dBm or below, the noise component is gradually increased, or the error rate is deteriorated so that the error mixture rate in the signal is increased. In addition, when the delay time of reflected wave exceeds the guard interval, or 3 μs, the error rate greatly increases. In FIG. 54, although the reflected wave level is assumed to be constant, the increase of the reflected wave level will increase the error rate. Therefore, even if the filed strength is slightly lowered, the receiving antenna should be adjusted in its orientation so that the reflected wave can be decreased or that the delay time of reflected wave is confined within 3 μs.
Thus, it is difficult to achieve the best receiving condition in digital transmission by adjusting the antenna orientation while monitoring only the field intensity as in the prior art. It is necessary to adjust the antenna by considering the reflected wave in addition to the field strength.